Date   : Mon, 23 Jan 1995 14:41:08 GMT
From   : David Alan Gilbert <gilbertd@...>
Subject: Re: Scrolling Swapping

> > I time everything by processor opcodes as you suggest your does, therefore
it should
> > just about work - but my screen timing is slightly off - I think - I'm
not taking
> >  account of the extra half scanline per field due to interlace - and
also my interrupt
> > entry latency is probably also duff.
> 
> Well, I draw the screen a scan line at a time, one every n ticks (I'm not
> at my PC so can't tell you exactly what I'm using) counting from the
> vertical sync.  There was a bit of discussion on one of the newsgroups
> sometime last year about how long each scan line should take given the PAL
> spec.  I'll see if I can find it again.

That is what I do - the scanline timing is calculated directly from the 
horizontal timing registers.  The vertical timing is also calculated that
way - without
any bodging the timing in the high res modes comes out at exactly the time for
312 scanlines per field.

> 
> Also, as a point of information, IRQ and NMI have a 7 cycle delay before
> executing the next opcode.  This is from the opcode information by various
> people (it's on my web pages - see below).  This info documents the
> illegal opcode functions and details exactly how each instruction works.

I think that interrupt latency may be tonights problem.

Dave