Date   : Thu, 04 Jan 1996 13:57:18 +0000 (GMT)
From   : James Fidell <james@...>
Subject: Timings for 65c[01]2 NOP instructions

I'm putting 65c02 and 65c12 support into my Beeb emulator and I'd like to
clarify a few things about the NOP instructions, which I can't find
documented anywhere.

Firstly, are all the NOPs single byte instructions ?  I'm assuming that
they aren't and that they retain the same addressing mode that their
positions in the tables of op-codes would imply.

If they aren't single-byte instructions, what action does the CPU
take during their execution ?  For example does opcode &44 do :

       read opcode
       read operand

or

       read opcode
       read operand as zero page address
       read data at zero page address

How many cycles do each of the NOP opcodes take to execute ?

I'm making educated guesses for the moment, but some hard facts would
be nice if anyone has them...

James.
-- 
 "Yield to temptation --             | Work: Somewhere at Netcom UK (soon)
  it may not pass your way again"    | Play: james@...                 
                                     | http://www.OiT.co.uk/~james/
        - Lazarus Long               |              James Fidell