Date   : Tue, 03 Apr 2001 20:04:27 +0100 (BST)
From   : jim <jim@...>
Subject: Re: 6502 Technical Term

> Just quickly, I'm (attempting) fixing instruction timing in BeebEm, but I
> can't quite work out what "Add 1 cycle if page boundary crossed means".

The extra cycle is the high-byte address fixup needed if the calculated
address is in a different page from the base address, i.e. adding the
offset crosses a page boundary. The 6502 actually performs an extra read
from the address &100 bytes before. Let us suppose we are executing an
LDA &1480,Y and Y contains &7F. Then no fixup is needed and the 6502 will
take 4 cycles:

1  read  PC    fetch LDA
2  read  PC    fetch &80, decode LDA
3  read  PC    fetch &14, add Y to &80
4  read  &14FF perform LDA

However if Y contained &8F, a fixup cycle would be needed:

1  read  PC    fetch LDA
2  read  PC    fetch &80, decode LDA
3  read  PC    fetch &14, add Y to &80
4  read  &140F perform high address fixup &14-&15
5  read  &150F perform LDA

> This rule applies to (&<8bit>),Y &16bit,X and &16bit,Y addressing modes,
> except for STA (and STZ on the 65C12).

Store instructions ALWAYS perform a fixup cycle as a read from a wrong
address is no problem whereas a write would be disastrous. So an STA would
take 5 cycles in either case.

Incidentally, very detailed timing information on the 6502 can be found in
the most excellent "64doc" which can be found at
http://www.cs.cmu.edu/~dsladic/vice/doc/64doc.txt or just type 64doc into
Google ... it was written for the Commodore 64 but is mostly accurate for
the Beeb also.

jim
-- 
http://madeira.physiol.ucl.ac.uk/people/jim/
"... I naturally gravitated to London, that great cesspool into which all the
 loungers and idlers of the Empire are irresistibly drained."
                                - Sir Arthur Conan Doyle, "A Study in Scarlet"