Date   : Sat, 04 Mar 2006 17:48:34 +0000 (GMT)
From   : Sprow <info@...>
Subject: Re: Warning: Sad case on list!

In article <uqhj02ldq04052isbqpbrm75jms86oskr5@...>,
   John Kortink <kortink@...> wrote:

[snip]

> >(I DO see the
> >point of the emulation code, but that would be better done in 1 FPGA
> >(c.w. Tube<tm>) with a coupla sticks of commodity SDRAM  surely?)
>
> For speed, yes. Simplicity hardly. A 6502 core is large
> and putting one in the FPGA is hardly a trivial task. To
> say nothing of putting in others.

In the FPGA section of my website there's just that: a 6502 core on FPGA. It
was a Xilinx part, and I've not recompiled it recently with newer devices,
but there are some useage stats somewhere round there.

> Emulation will leave enough speed for a few factors of
> speed increase, compared to the real 2p. And it's more
> flexible.

I would tend to agree with John though that emulating a 3MHz 6502 on a 64MHz
ARM with the cache on should be perfectly do-able and rather less bother
than messing about with scopes and JTAG cables,
Sprow.