Date : Mon, 02 Mar 2009 19:35:19 +0100
From : kortink@... (John Kortink)
Subject: Fwd: New Screen Modes with ARM7 Co-Processor?
On Mon, 2 Mar 2009 13:28:03 +0000 (GMT), tommowalker@...
>> >Why does it need to be linearly addressable?
>> Because the CRTC needs it to be. Why is that so hard to understand ?
>No, the CRTC only needs to _think_ it is. Is this difficult to understand?
>Vblank - load CRTC address for &3000, set &FE34 to display main bank
>lines 0-127 (in our field) - CRTC displays main memory &3000-7FFF
>line 128 - set &FE34 to display shadow bank, CRTC wraps back round to &3000
>lines 128-255 - CRTC displays shadow memory &3000-7FFF
That's (only) one frame. So it needs to be followed by a
second similar phase whereby the start address is changed
to match the start line of the other frame.
But that hardly constitutes 'hardware support'. And it
is far more complex and far more sensitive to timing
than what I suggested. You only need to switch banks
every frame (in the vblank period) if you leave the
CRTC in 'interlace sync' mode.
>If you're so insistent that the CRTC needs to have the base address
>reloaded, then fine!
No, just insistent that you can't change the CRTC start
address mid-frame (as in : the appropriate registers in
Using the wraparound instead is a neat trick, but it
doesn't change the CRTC's start address.
Email : kortink@...
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