Date   : Thu, 02 Jan 2014 20:04:01 +0000
From   : flynnjs@... (Jason Flynn G7OCD)
Subject: Modernisations

On 02/01/2014 14:07, John Kortink wrote:

> First of all, the video ULA does not get all the signals that
> are needed to do this, e.g. hsync, vsync, and the TTX pixel
> clock (although it may be possible to derive it, since it
> comes from the same source as the video ULA pixel clock).

Well I've seen plenty of plug in boards over the years that
have fly leads so another one doesn't really matter :-)

> Second, HDMI and DVI do not tolerate interlacing, nor the
> (low) line and frame rates that are generated, which can
> only be solved by buffering and then rendering at two or
> four times the normal rate(s).

Sorry, that is not correct. The DVI spec doesn't include
576i it but the HDMI spec does. There are many PC monitors
that do not support TV SD625/25 PAL etc input signals but
plenty of HDMI TVs that do. Even that isn't fixed. I've
got access to a number of identical Samsung PC monitors
and one of them has a newer firmware that gave it the
ability to display SD and HD TV resolutions.

I personally use 576i out of a PC HDMI port (nVidia Quadro
FX3800) and feed that into SD MPEG2 encoder and also
another PC HDMI capture card. I have a heap of Black Magic
Design stuff which all supports SD/PAL over HDMI.


By far the biggest challenge is fact that the pixels on
the Beeb are not the same aspect ratio as any other TV or
PC standard so you'd to implement need an anti aliasing
scaler to stop the picture looking tall/narrow.
Somewhere jotted down I have a very crude method for
doing a simple weighted pixel insertion scheme that I
dreamt up so that I could connect the FPGA Beeb directly
to a LVDS flat panel.