6502

10 REM > 6502

20 :

30 DEFPROCGo:abort%=FALSE:halt%=0:run%=TRUE:PROCEscOff

40 REPEAT:IF(debug%AND1):IF rpc%>=trace0% AND rpc%<=trace1%:x%=POS:y%=VPOS:VDU30:PROCRegDump:VDU31,x%,y%:IF(debug%AND2):IF GET

50 B%=mem%?rpc%:rpc%=rpc%+1:UNTIL EVAL("FNm"+STR$~(B%AND&1C)+"+FN_"+STR$~(B%AND(((B%AND1)<>1)OR&E3))):PROCEscOn:run%=FALSE:IF NOTquiet% OR abort%:PROCRegDump

60 ENDPROC

70 :

80 :

90 DEFFNbr(A%):rpc%=rpc%+1:IFA%=0:=0

100 IFmem%?(rpc%-1)<128:rpc%=(rpc%+mem%?(rpc%-1))AND&FFFF:=0

110 rpc%=(rpc%+mem%?(rpc%-1)-256)AND&FFFF:=0

120 :

130 :

140 DEFFNm0 :A%=(mem%!((mem%?rpc%+rx%)AND&FF))AND&FFFF:=0 :REM (zp,X)

150 DEFFNm4 :A%=mem%?rpc%:=0 :REM zp

160 DEFFNm8 :A%=rpc%:=0 :REM #n

170 DEFFNmC :A%=(mem%!rpc%)AND&FFFF:rpc%=rpc%+1:=0 :REM abs

180 DEFFNm10:A%=(mem%!(mem%?rpc%)+ry%)AND&FFFF:=0 :REM (zp),Y

190 DEFFNm12:A%=(mem%!(mem%?rpc%))AND&FFFF:=0 :REM (zp)

200 DEFFNm14:A%=(mem%?rpc%+rx%)AND&FF:=0 :REM zp,X

210 DEFFNm18:A%=(mem%!rpc%+ry%)AND&FFFF:rpc%=rpc%+(B%AND1):=0 :REM abs,Y

220 DEFFNm1C:A%=(mem%!rpc%+rx%)AND&FFFF:rpc%=rpc%+1:=0 :REM abs,X

230 :

240 :

250 DEFFN_1 :ra%=ra%ORmem%?A%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):rpc%=rpc%+1:=0 :REM ORA

260 DEFFN_21:ra%=ra%ANDmem%?A%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):rpc%=rpc%+1:=0:REM AND

270 DEFFN_41:ra%=ra%EORmem%?A%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):rpc%=rpc%+1:=0:REM EOR

280 DEFFN_61:ra%=ra%+mem%?A%+(rp%AND1):rp%=(rp%AND254)+(ra%DIV256):ra%=ra%AND255:rp%=(rp%AND&3D)OR(ra%AND128)OR(((ra%AND128)DIV2)EOR(ra%AND64))OR((ra%=0)AND2):rpc%=rpc%+1:=0 :REM ADC

290 DEFFN_81:IFB%=&8A:=FN_8A ELSE PROCio_wr(A%,ra%):rpc%=rpc%+1:=0 :REM STA

300 DEFFN_A1:ra%=FNio_rd(A%):rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):rpc%=rpc%+1:=0 :REM LDA

310 DEFFN_C1:A%=ra%-mem%?A%:rp%=(rp%AND254)+(((A%EOR256)AND256)DIV256):A%=A%AND255:rp%=(rp%AND&3D)OR(A%AND128)OR((A%=0)AND2):rpc%=rpc%+1:=0 :REM CMP

320 DEFFN_E1:ra%=ra%-mem%?A%-(1-(rp%AND1)):rp%=(rp%AND254)+(((ra%EOR256)AND256)DIV256):ra%=ra%AND255:rp%=(rp%AND&3D)OR(ra%AND128)OR(((ra%AND128)DIV2)EOR(ra%AND64))OR((ra%=0)AND2):rpc%=rpc%+1:=0 :REM SBC

330 :

340 DEFFN_12:=FNm12+FN_1 :REM ORA (zp)

350 DEFFN_32:=FNm12+FN_21 :REM AND (zp)

360 DEFFN_52:=FNm12+FN_41 :REM EOR (zp)

370 DEFFN_72:=FNm12+FN_61 :REM ADC (zp)

380 DEFFN_92:=FNm12+FN_81 :REM STA (zp)

390 DEFFN_B2:=FNm12+FN_A1 :REM LDA (zp)

400 DEFFN_D2:=FNm12+FN_C1 :REM CMP (zp)

410 DEFFN_F2:=FNm12+FN_E1 :REM SBC (zp)

420 :

430 :

440 DEFFN_8 :mem%?rs%=rp%:rs%=rs%-1:=0 :REM PHP

450 DEFFN_28:rs%=rs%+1:rp%=mem%?rs%:=0 :REM PLP

460 DEFFN_48:mem%?rs%=ra%:rs%=rs%-1:=0 :REM PHA

470 DEFFN_5A:mem%?rs%=ry%:rs%=rs%-1:=0 :REM PHY

480 DEFFN_68:rs%=rs%+1:ra%=mem%?rs%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM PLA

490 DEFFN_7A:rs%=rs%+1:ry%=mem%?rs%:rp%=(rp%AND&7D)OR(ry%AND128)OR((ry%=0)AND2):=0 :REM PLY

500 DEFFN_DA:mem%?rs%=rx%:rs%=rs%-1:=0 :REM PHX

510 DEFFN_FA:rs%=rs%+1:rx%=mem%?rs%:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):=0 :REM PLX

520 :

530 :

540 DEFFN_10:=FNbr((rp%AND128)EOR128) :REM BPL

550 DEFFN_30:=FNbr(rp%AND128) :REM BMI

560 DEFFN_50:=FNbr((rp%AND64)EOR64) :REM BVC

570 DEFFN_70:=FNbr(rp%AND64) :REM BVS

580 DEFFN_80:=FNbr(1) :REM BRA

590 DEFFN_90:=FNbr((rp%EOR1)AND1) :REM BCC

600 DEFFN_B0:=FNbr(rp%AND1) :REM BCS

610 DEFFN_D0:=FNbr((rp%AND2)EOR2) :REM BNE

620 DEFFN_F0:=FNbr(rp%AND2) :REM BEQ

630 :

640 :

650 DEFFN_18:rp%=rp%AND&FE:=0 :REM CLC

660 DEFFN_38:rp%=rp%OR1:=0 :REM SEC

670 DEFFN_58:rp%=rp%AND&FB:=0 :REM CLI

680 DEFFN_78:rp%=rp%OR4:=0 :REM SEI

690 DEFFN_B8:rp%=rp%AND&BF:=0 :REM CLV

700 DEFFN_D8:rp%=rp%AND&F7:=0 :REM CLD

710 DEFFN_F8:rp%=rp%OR8:PRINT"**BCD not supported***":=0 :REM SED

720 :

730 :

740 DEFFN_0:rpc%=rpc%+1:rs%=rs%-3:mem%?(rs%+1)=rp%OR&10:mem%?(rs%+2)=rpc%:mem%?(rs%+3)=rpc%DIV256:rpc%=(mem%!&FFFE)AND&FFFF:rp%=rp%OR4:=0 :REM BRK

750 DEFFN_20:a%=mem%!rpc%:rpc%=rpc%+1:rs%=rs%-2:mem%?(rs%+1)=rpc%:mem%?(rs%+2)=rpc%DIV256:rpc%=a%AND&FFFF:=0

760 :REM JSR

770 DEFFN_40:rp%=mem%?(rs%+1):rpc%=(mem%!(rs%+2))AND&FFFF:rs%=rs%+3:rpc%=rpc%+1:=0 :REM RTI

780 DEFFN_4C:rpc%=A%:=0 :REM JMP abs

790 DEFFN_60:rpc%=(mem%!(rs%+1))AND&FFFF:rs%=rs%+2:rpc%=rpc%+1:=0 :REM RTS

800 DEFFN_6C:rpc%=(mem%!A%)AND&FFFF:=0 :REM JMP (abs)

810 DEFFN_7C:rpc%=(mem%!A%)AND&FFFF:=0 :REM JMP (abs,X)

820 DEFFN_EA:=0 :REM NOP

830 :

840 :

850 DEFFN_8A:ra%=rx%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM TXA

860 DEFFN_98:ra%=ry%:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM TYA

870 DEFFN_9A:rs%=rx%+&100:=0 :REM TXS

880 DEFFN_A8:ry%=ra%:rp%=(rp%AND&7D)OR(ry%AND128)OR((ry%=0)AND2):=0 :REM TAY

890 DEFFN_AA:rx%=ra%:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):=0 :REM TAX

900 DEFFN_BA:rx%=rs%AND&FF:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):=0 :REM TSX

910 :

920 :

930 DEFFN_1A:ra%=(ra%+1)AND&FF:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM INC A

940 DEFFN_3A:ra%=(ra%-1)AND&FF:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM DEC A

950 DEFFN_88:ry%=(ry%-1)AND&FF:rp%=(rp%AND&7D)OR(ry%AND128)OR((ry%=0)AND2):=0 :REM DEY

960 DEFFN_C8:ry%=(ry%+1)AND&FF:rp%=(rp%AND&7D)OR(ry%AND128)OR((ry%=0)AND2):=0 :REM INY

970 DEFFN_CA:rx%=(rx%-1)AND&FF:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):=0 :REM DEX

980 DEFFN_E8:rx%=(rx%+1)AND&FF:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):=0 :REM INX

990 :

1000 DEFFN_C6: :REM DEC zp

1010 DEFFN_CE: :REM DEC abs

1020 DEFFN_D6: :REM DEC zp,X

1030 DEFFN_DE: :REM DEC abs,X

1040 mem%?A%=(mem%?A%-1)AND&FF:rp%=(rp%AND&7D)OR((mem%?A%)AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1050 :

1060 DEFFN_E6: :REM INC zp

1070 DEFFN_EE: :REM INC abs

1080 DEFFN_F6: :REM INC zp,X

1090 DEFFN_FE: :REM INC abs,X

1100 mem%?A%=(mem%?A%+1)AND&FF:rp%=(rp%AND&7D)OR((mem%?A%)AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1110 :

1120 :

1130 DEFFN_A2:A%=rpc% :REM LDX #n

1140 DEFFN_A6: :REM LDX zp

1150 DEFFN_AE: :REM LDX abs

1160 DEFFN_B6:A%=(mem%?rpc%+ry%)AND&FF :REM zp,X

1170 DEFFN_BE:A%=(A%-rx%+ry%)AND&FFFF:rpc%=rpc%+1 :REM abs,Y

1180 rx%=mem%?A%:rp%=(rp%AND&7D)OR(rx%AND128)OR((rx%=0)AND2):rpc%=rpc%+1:=0

1190 :

1200 DEFFN_A0:A%=rpc% :REM LDY #n

1210 DEFFN_A4: :REM LDY zp

1220 DEFFN_AC: :REM LDY abs

1230 DEFFN_B4: :REM LDY zp,X

1240 DEFFN_BC: :REM LDY abs,X

1250 ry%=mem%?A%:rp%=(rp%AND&7D)OR(ry%AND128)OR((ry%=0)AND2):rpc%=rpc%+1:=0

1260 :

1270 :

1280 DEFFN_86: :REM STX zp

1290 DEFFN_8E: :REM STX abs

1300 DEFFN_96:A%=(A%-rx%+ry%)AND&FFFF :REM STX zp,Y

1310 mem%?A%=rx%:rpc%=rpc%+1:=0

1320 :

1330 DEFFN_84: :REM STY zp

1340 DEFFN_8C: :REM STY abs

1350 DEFFN_94: :REM STY zp,X

1360 mem%?A%=ry%:rpc%=rpc%+1:=0

1370 :

1380 :

1390 DEFFN_64: :REM CLR zp

1400 DEFFN_74: :REM CLR zp,X

1410 DEFFN_9C:A%=(A%-rx%)AND&FFFF :REM CLR abs

1420 DEFFN_9E: :REM CLR abs,X

1430 mem%?A%=0:rpc%=rpc%+1:=0

1440 :

1450 :

1460 DEFFN_A :ra%=ra%*2:rp%=(rp%AND&FE)+ra%DIV256:ra%=ra%AND&FF:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0: :REM ASL A

1470 DEFFN_6 : :REM ASL zp

1480 DEFFN_E : :REM ASL abs

1490 DEFFN_16: :REM ASL zp,X

1500 DEFFN_1E: :REM ASL abs,X

1510 a%=mem%?A%*2:rp%=(rp%AND&FE)+a%DIV256:mem%?A%=a%:rp%=(rp%AND&7D)OR(mem%?A%AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1520 :

1530 DEFFN_2A:ra%=ra%*2+(rp%AND1):rp%=(rp%AND&FE)+ra%DIV256:ra%=ra%AND&FF:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM ROL A

1540 DEFFN_26: :REM ROL zp

1550 DEFFN_2E: :REM ROL abs

1560 DEFFN_36: :REM ROL zp,X

1570 DEFFN_3E: :REM ROL abs,X

1580 a%=mem%?A%*2+(rp%AND1):rp%=(rp%AND&FE)+a%DIV256:mem%?A%=a%:rp%=(rp%AND&7D)OR(mem%?A%AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1590 :

1600 DEFFN_4A:rp%=(rp%AND&FE)OR(ra%AND1):ra%=ra%DIV2:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM LSR A

1610 DEFFN_46: :REM LSR zp

1620 DEFFN_4E: :REM LSR abs

1630 DEFFN_56: :REM LSR zp,X

1640 DEFFN_5E: :REM LSR abs,X

1650 rp%=(rp%AND&FE)OR(mem%?A%AND1):mem%?A%=mem%?A%DIV2:rp%=(rp%AND&7D)OR(mem%?A%AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1660 :

1670 DEFFN_6A:ra%=ra%+256*(rp%AND1):rp%=(rp%AND&FE)+(ra%AND1):ra%=ra%DIV2:rp%=(rp%AND&7D)OR(ra%AND128)OR((ra%=0)AND2):=0 :REM ROR A

1680 DEFFN_66: :REM ROR zp

1690 DEFFN_6E: :REM ROR abs

1700 DEFFN_76: :REM ROR zp,X

1710 DEFFN_7E: :REM ROR abs,X

1720 a%=mem%?A%+256*(rp%AND1):rp%=(rp%AND&FE)+(a%AND1):mem%?A%=a%DIV2:rp%=(rp%AND&7D)OR(mem%?A%AND128)OR((mem%?A%=0)AND2):rpc%=rpc%+1:=0

1730 :

1740 :

1750 DEFFN_89:A%=rpc% :REM BIT #n

1760 DEFFN_24: :REM BIT zp

1770 DEFFN_2C: :REM BIT abs

1780 DEFFN_34: :REM BIT zp,X

1790 DEFFN_3C: :REM BIT abs,X

1800 rp%=(rp%AND&3D)OR(mem%?A%AND&C0)OR(((mem%?A%ANDra%)=0)AND2):rpc%=rpc%+1:=0

1810 :

1820 :

1830 DEFFN_C0:A%=rpc% :REM CPY #n

1840 DEFFN_C4: :REM CPY zp

1850 DEFFN_CC: :REM CPY abs

1860 A%=ry%-mem%?A%:rp%=(rp%AND254)+(((A%EOR256)AND256)DIV256):A%=A%AND255:rp%=(rp%AND&3D)OR(A%AND128)OR((A%=0)AND2):rpc%=rpc%+1:=0

1870 :

1880 DEFFN_E0:A%=rpc% :REM CPX #n

1890 DEFFN_E4: :REM CPX zp

1900 DEFFN_EC: :REM CPX abs

1910 A%=rx%-mem%?A%:rp%=(rp%AND254)+(((A%EOR256)AND256)DIV256):A%=A%AND255:rp%=(rp%AND&3D)OR(A%AND128)OR((A%=0)AND2):rpc%=rpc%+1:=0

1920 :

1930 DEFFN_4 :Z%=FNm4 :REM TSB zp

1940 DEFFN_C :Z%=FNmC :REM TSB abs

1950 rp%=(rp%AND253)+(((mem%?A% AND ra%)=0)AND2):mem%?A%=mem%?A% OR ra%:rpc%=rpc%+1:=0

1960 :

1970 DEFFN_14:Z%=FNm4 :REM TRB zp

1980 DEFFN_1C:Z%=FNmC :REM TRB abs

1990 rp%=(rp%AND253)+(((mem%?A% AND ra%)=0)AND2):mem%?A%=mem%?A% AND NOT ra%:rpc%=rpc%+1:=0

2000 :

2010 :

2020 REM MOS Interface

2030 DEFFN_3 : :REM OSCLI /OSBYTE

2040 DEFFN_23: :REM OSWORD/OSWRCH

2050 DEFFN_43: :REM OSRDCH/OSFILE

2060 DEFFN_63: :REM OSARGS/OSBGET

2070 DEFFN_83: :REM OSBPUT/OSGBPB

2080 DEFFN_A3: :REM OSFIND/OSQUIT

2090 DEFFN_C3: :REM OSLANG/ -

2100 DEFFN_E3: :REM - / -

2110 =FNmos(mem%?(rpc%-1))

2120 :

2130 :

2140 DEFFN_2 : :REM ---

2150 DEFFN_22: :REM ---

2160 DEFFN_42: :REM ---

2170 DEFFN_44: :REM ---

2180 DEFFN_54: :REM ---

2190 DEFFN_5C: :REM ---

2200 DEFFN_62: :REM ---

2210 DEFFN_82: :REM ---

2220 DEFFN_C2: :REM ---

2230 DEFFN_D4: :REM ---

2240 DEFFN_DC: :REM ---

2250 DEFFN_E2: :REM ---

2260 DEFFN_F4: :REM ---

2270 DEFFN_FC: :REM ---

2280 =0