Date   : Tue, 30 Aug 1994 10:36:00 +0100
From   : jfid@... (James Fidell)
Subject: Re: BBC keyboard interrupts.

Stephen Quan wrote:

> Frankly, I can't get the System VIA or the keypad to respond.
> I have put in debug code that will trace all reads and writes to
> &FE40-&FE4F.  Also, I painstakenly got all the flags in IFR and
> IER figured out (I might bring it in tomorrow and post the 4 line
> macro for both of these 2 via registers to see if anyone see
> anything wrong with it).

I had exactly the same problem at one point.  I never managed to work
out what was going wrong.  In desperation, I just went on and implemented
functionality in the system VIA that I hadn't yet done, thinking that
I'd leave the problem for a while and come back to it later.

For reasons that I don't understand, once I'd implemented the T1/T2 timer
code, the problem went away.  I don't know why this should be -- perhaps
I inadvertently corrected a bug in the VIA emulation.

> Also, I don't know why, for clean entry to the NMI, what I have to do is
> 
>     push(P)
>     push(PC)
>     P |= P_I;
>     PC = readmemoryword(0xFFFE);

I think you mean IRQ, not NMI (which should indirect through &FFFA when
it's used).

> I noticed in xbeeb by James F, MaskableInterrupt pushses  P and PC onto
> the stack the other way around.  When I did that the interrupt never
> returned to the same place and spewed a lot of junk as if it was
> executing a BRK command and was dumping parts of the BASIC ROM all over
> my screen.

The P register *must* be pushed onto the stack last.  If you look at the
IRQ-handling code at &DC1C, it does :

       STA &FC
       PLA
       PHA
       AND #&10
       ...

This saves the value of A on entry to the IRQ handler, then uses PLA,PHA
to get the value on the top of the stack into A.  The next instruction is
to see if the BRK flag was set in the image of P pushed onto the stack.

> I doubled check RTS and RTI and they seem ok.  As a matter of fact,
> generating error messages using BRK seems fine, so I don't know why
> I should be having problems with maskable interrupts.

It does sound to me like your interrupt handling is broken somewhere.
When you get a hardware IRQ, are you clearing the B flag in P before you
jump to the IRQ address ?

James.

-- 
 "Yield to temptation --             |
  it may not pass your way again"    |     jfid@...        
                                     |
        - Lazarus Long               |              James Fidell