Date   : Wed, 28 Sep 1994 13:45:44 WET DST
From   : Bonfield James <jkb@...>
Subject: Re: &FE41

Chris Lam writes:

>does anyone know precisely about the behaviour of reading from &FE41?

Unfortunately I haven't got my docs with me currently. However looking at my
code I see the following (excuse the questioning comments and FIXMEs):

    case 0x1: /* output reg A */
        ifr &= ~IFR_CA1;
        if (pcr & 0x0a != 0x02)
            ifr &= ~IFR_CA2;
        update_ifr_clr();

        /* NOTE: flow through to case 0xf: */

    case 0xf: /* output reg A, no handshake */

        /*
         * FIXME:
         * With DDRA set to 1 (output), should be reading the levels
         * stored on the output latch? Makes no difference for us - I
         * hope! Input latching (see the acr) has an effect here.
         */
        if (acr & 0x01)
            return ora;
        else
            return ora /* & ~ddrb */; /* FIXME */

Unfortunately I cannot remember the bits in PCR. I think it's something to do
with independent mode. Input latching probably isn't required by any standard
Beeb programs (I hope), so currently my implementation ignores such things.

>it also depends on the PCR. is this the same as reading from &FE4F?
>and if it is, then potentially a few video sync interrupts will be missed.

Hmm. Unsure here. I keep meaning to read (and type up) the datasheet.

       James