Date   : Mon, 23 Jan 1995 16:49:46 +0000 (GMT)
From   : Mark Cooke <ee2015@...>
Subject: Re: REVS Timing

Chris wrote:
> Mark Cooke wrote:
> 
> ;Well, I hope that my current design
> ;methodology for my emulator will deal with this correctly.  It does mean a
> ;bit of extra work keeping the VIA interrupts in sync though.  I currently
> ;time the machine by using the opcode counters.  Hopefully slight errors
> ;in timing won't cause a problem.
> 
> 
> I found it impossible to keep exact time AND get good performance.
> On your faster PCs and in machine code, the task becomes feasible.
> It's really only REVS which is fussy which is why gave up and implemented
> a REVS cheat. It's a lot of effort just for the benefit of one game.
> Getting the timing absolutely bang-on seems to me a real herculian
> task. I can just imagine the agony of watching the REVS interrupts
> scroll very, very slowly up the screen...
> 

Well, I think that as long as the via timeouts are checked for after every
opcode there should not be a problem, even if the actual opcode ticks are
not quite right.  The problem seems to be caused by the variable delay
between when the IRQ should have been flagged and then it actually occurs.
Checking after every code should (at least) reduce the problem.  I just
wonder how Revs on the real bbc manages to deal with different interrupt
times, depending on when the timer irq actually happens.  Compare, for
instance you're doing a 7 tick opcode and a 3 tick one.  Say the irq
happens just after the instruction starts.  The first has a delay of 14
ticks, and the latter 10.  Any ideas how revs actually deals with this
slight error, which would increase over time.

Mark

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