Date   : Sun, 27 Sep 1998 22:30:25 +0100
From   : Stuart William McConnachie <stuart@...>
Subject: Re: Opcode timings

In message <bef42d8c48%emulators@...>, Michael
Borcherds <emulators@...> writes
>Has anyone ever verified for themselves the oft-qtoted
>"+1 if page crossed" for opcode timings?
Yes and it is there, on a Beeb with a standard 6502.

>I tried to recreate it when getting precise timings for
>my emulator, and failed to find it.
>
>My code went something like:
>
>LDA &1050,X ; this is the opcode we want to time
>
>LDA &3000,X
>EOR &FE68 ; low byte of timer 2
Ah, but this instruction doesn't take the 4 cycles quoted for a nornal
EOR.  Remember it's accessing the slow data bus which runs at 1MHz, so
the processor clock is stretched for part of this fetch/execute cycle.
Depending on whether the 6502 was executing a odd or even clock (in
relation to the fixed 1Mhz) at the start of the instruction this will
cause the number of cycles taken to execute the EOR to increase by
either 1 or 2 2Mhz clocks (IIRC).  Therefore this could remove any
effect you observe from the page cross in the LDA &1050,X instruction
(since the extra cycle may just be added back in when you get to the EOR
&FE68)!
>STA &3000,X
>
><loop until screen filled>
>
>so as to fill the screen with "rubbish". Then load this
>into emulator and, if all the timings are correct, the
>screen will clear again.
Only if you disable interrupts and initialize the timer before you
start.

>From memory, I was running this on a Master 128.
The 65C12 processor in the Master may have had different timings from
the original B.  I'll need to check this.

A much better way to measure instruction cycles is:
 10 FOR W%=0 TO 2 STEP 2
 20 P%=&900
 30 [OPT W%
 40 LDX#&00
 50 SEI
 60 LDA#&40             ; Initialize timer
 70 STA&FE6B
 80 LDA#&00
 90 STA&FE68
100 STA&FE69
110 LDA&01FF,X  ; Instruction to time*2
120 LDA&01FF,X
130 LDA&FE68
140 CLI
150 RTS
160 ]
170 NEXT
180 C%=USR(&900)AND &FF
190 C%=&FE-C%
200 PRINT C%

Note:
We need to do the instruction to time twice because the CPU clock runs
at 2Mhz, but the timer only runs at 1MHz.
We have to disable interrupts to stop an IRQ occuring during the timing!
We use the value in the timer less 2 (accounts for time to setup and
read timer) to get the number of cycles used by the instruction.

Change line 40 to LDX#&01 to observe the effect of a page-crossing LDA
abs,X instruction.

Regards,
-- 
Stuart McConnachie (stuart@...              )
43 The Hollows, Long Eaton, Nottingham, NG10 2ES, UK
Mobile: 0966 224307