Date   : Sun, 22 Sep 2002 10:29:16 +0100
From   : Sprow <info@...>
Subject: Re: BBC B with edge-connectors instead of IDC connectors?

In article <978qous11ckkbrkmr0vccq2m4jbvb99vj5@...>,
   John Kortink <kortink@...> wrote:
> On Sat, 21 Sep 2002 18:51:39 +0100, Sprow wrote:

> >In article <KNEEJIOPPHNNBHBMMGACOEDFCDAA.r.gellman@...>,
> >   Richard Gellman <r.gellman@...> wrote:
> >> To summarise everything:
> >
> >[snip]
> >
> >> The ADFS is Paged ROM 13 in this
> >> chip, and can be read from the Master as a ROM image using a standard 
> >> method
> >> of disabling interrupts, switching banks, copy the data, switch banks back,
> >> enable interrupts, and save the data.
> >
> >No particular reason to disable interrupts,since interrupt handlers must
> >preserve the ROM state anyway.The important thing is to update the 
> >softcopy at &F4 *before* you poke the ROM latch,

> No, it's still unsafe. You *have* to disable interrupts to
> make the combined update of ?&F4 and ROMSEL (?&FE30) atomic.
>
> Fatal scenarios are somewhat contrived, but if an interrupt
> occurs in between updating ?&F4 and ROMSEL, ?&F4 no longer
> corresponds to ROMSEL during an interrupt handler, and when
> that handler itself accesses a ROM and then *restores* ROMSEL
> from ?&F4, it will exit with a different ROM selected than
> when it was entered.

But in your example here the IRQ happened between writing F4 and FE30,so it
doesn't matter that both the action of exiting the interrupt routine and the
next instruction of the foreground task both update FE30 since they both
update it with the same value.

As FE30 is readonly,any interrupt routine which feels it necessary to jiggle
the ROMs around reads and stacks F4.On exit from the interrupt handler it
pulls and writes to *both* F4 and FE30,hence my comment about writing to F4
*first* and not bothering to disable IRQs,
Sprow.