Date : Wed, 19 Mar 2003 09:28:14 +0000
From : Richard_Talbot-Watkins@...
Subject: Re: Emulating Elite (more 6845 problems)
Seddon Tom <TSeddon@...> wrote:
> I'm writing a new emulator, and I'm confused about why Elite's mode
> split point is 2 scanlines above where it should be.
> [...]
I'm sure the solution lies in the emulation of the VSync width stored
in the top 4 bits of CRTC_R3. Unfortunately it was a little while ago
when I was investigating this (when getting an understanding of the
smooth vertical scroll hack which can require some reasonably delicate
timing).
I had a feeling that the VDU VSync and the CA1 IRQ happen at different
times, i.e. the VDU VSyncs at the start of the pulse (leading edge),
and the interrupt is generated at the end of the pulse (falling edge).
I think I used this to explain why I could move my colour interrupt
fringes by scanline amounts by simply altering the value in CRTC_R3.
Does this ring true at all? Sorry I can be no less vague, but it's a
little while since I thought about this, and I have a bad hangover!
Keep us informed :)
Rich
--
Rich Talbot-Watkins
Sony Computer Entertainment Europe
Cambridge Studio
Seddon Tom
<TSeddon@... To: bbc-micro@...
grames.com> cc:
Sent by: Subject: [BBC-Micro] Emulating
Elite (more 6845 problems)
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18/03/2003 18:34
I'm writing a new emulator, and I'm confused about why Elite's mode split
point is 2 scanlines above where it should be.
It works fine on BeebEm, but it looks like BeebEm induces a 2 scanline
delay, so the vsync start and end points are 2 scanlines after where,
judging from the registers, one might expect them to be. (Take a peek at
VideoDoScanline and the use of VSyncCount.)
So, the question is... does anyone know where this magic '2' come from? If
I
force my emulator's vsync to last ((R3>>4)+2) scanlines (as a very quick
hack with the same net result in terms of when the CA1 IRQ occurs), Elite
looks fine, but now I have a magic +2 and I don't know why it's needed.
The strange thing is, the split point _is_ actually at the right point. The
Elite screen is pretty similar in timing to normal interlaced Mode 4 or 5.
R4 is 38, R6 is 31, R7 is 34, R5 is 0, R8 is 1, R9 is 7. So that's
(38+1)*(7+1)=39*8=312 scanlines, and R8&1 so +.5 making a grand total of
312.5. (By the way R3 is 0x24.) On each Vsync, SysVIA T1 is loaded with
14,622. That's 228.5 scanlines, accounting for the 2 tick delay for
reloading the T1 timer: 14624/60.0=228.5.
Let us assume that the vsync IRQ has just fired. The TV is on scanline
34*8+(R3>>4)=272. Now the screen is set up for Mode 4, T1 is set to 14,622,
and off it goes for 228.5 scanlines. There's 38.5 scanlines left in the
vblank, so the split point should occur at line 190, changing display to
Mode 5 for the scanner. R5 is 0, so this doesn't need to be considered.
And this it does. However, the border between the top and bottom of the
screen (the point at which the split _should_ occur -- it's the top line of
the status display) is at line 192. Hence the problem.
I've been searching the web and usenet and looking through 6845 datasheets,
but I haven't found anything that seems relevant. I found some stuff about
interlace sync and video register settings being in pairs of scanlines on
older 6845s, which sounds perfect except that the Beeb's is a 'newer' one
because it has programmable vsync widths. I also have a sneaking suspicion
I'm missing something totally and/or that I've got something terribly wrong
somewhere! Does anyone have any ideas?
--Tom
P.S. I have the same problem in Lunar Jetman, Imogen, Phantom and Revs. I'm
hoping all have the same root cause.
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