Date   : Tue, 03 Feb 2004 22:36:57 +0000
From   : jgh@... (Jonathan Graham Harston)
Subject: Re: IDE Interface for BBC

Latest update...
 
Well, it's still not working.
 
I thought I had it. Reading the IDE specs very carefully revealed that
~IORD and ~IOWR are defined as STROBEs. That is, the IDE device acts on
the falling edge of ~IORD or ~IOWR. The IDE device expects the host to set
the correct Select address, and then strobe ~IORD or ~IOWR to indicate
transfer should occur:
     _________  _____________  _____
ADDR          \/             \/
     _________/\_____________/\_____
     __________                _____
~CS            \              /
                \____________/
     _____________          ________
~IORD             \        /
                   \______/
                   ^
                  IDE
                responds
 
This is the opposite way round to the 6502 and other CPUs with a R/~W
line. With these R/~W is set up /before/ the address select; the address
select acts as the device strobe:
     _________  _____________  _____
ADDR          \/             \/
     _________/\_____________/\_____
     __________                _____
~CS            \              /
                \____________/
     _______     ^               ___
R/~W        \    ^              /
     _______/\___^_____________/\___
                 ^
              65xx device
                responds
 
So, I altered the interface,
(see http://www.mdfs.net/Info/Comp/BBC/Hardware/IDE/8bitcd.gif )
changing the wiring to the second 2-to-8 decoder as follows:
 
           +--------+
    R/~W---+ A     0+-
           |       1+-
    A6  ---+ B     2+------~IOWR
           |    E  3+------~IORD
           +----+---+
                |
    ------------+----------~CS0
 
So ~IORD and ~IOWR only ever drop low when ~CS0 drops low, when the IDE
address is decoded. (Incidently, this also results in the interface being
mirrored at &FC40/50/60/70).
 
Again, I could access the IDE registers at &FC41-&47, but still reading
sectors gives only the first byte.
 
Ruud Baltissen at http://home.hccnet.nl/g.baltissen/ide.htm mentions that
he had problems with ~IORD timing, and used an RC network to delay the
signal.  So, following on from that, I added a resister and capacitor to
the ~IORD line as with his scheme, viz:
 
   |     
  3+----/\/\/\/\--+---~IORD
   |      100R    |
                 ---
                 --- 1nF
                  |
              0v--+--
 
It STILL doesn't work!  Grrr!
 
Any suggestions?  Is there somebody out there who fancies me commissioning
them to get this working?
 
I really REALLY don't want to end up having to toggle ~IORD or ~IOWR
manually by talking to a status port.  I want the driving software to be
able to do:
 
LDY #0
.iderdlp
LDA IDEdata:STA (addr),Y:INY:BNE iderdlp
 
I don't want to end up having to do:
 
LDY #0
.iderdlp
LDA #iord:STA IDEselect
LDA IDEdata:STA (addr),Y
LDA #0:STA IDEselect
INY:BNE iderdlp
 
 
-- 
J.G.Harston (JGH BBC PD Library) 70 Camm Street, Walkley, SHEFFIELD S6 3TR
jgh@...                - Running on BBCs & Masters with SJ MDFS FileServer
Z80+6502/CoPro+Tubes/Econet+SJ - - - - - - - http://www.mdfs.net/User/JGH/