Date   : Mon, 24 May 2004 19:15:11 +0100
From   : Sprow <info@...>
Subject: Re: Tube / Master Coprocessor question

In article <16562.6777.640000.345763@...>,
   Angus Duggan <angus.duggan@...> wrote:
> Mike Tomlinson writes:
> >The lower 4 bytes form the actual address; if the upper 2 bytes are FF,
> >the code is loaded/run in the  I/O processor, if they're 00, it's
> >loaded/run in the second processor.  Can't recall offhand what values
> >other than FF or 00 mean, if anything (my AUG's in the loft.)

> Actually, 0xFFFFxxxx is reserved for the I/O processor. 

Yup, all the FS APIs set aside 4 bytes for load/exec but some FS's skimp on
how these are actually stored. For example DFS ran out of space in the
catalogue so 

> DNFS variants only support 18-bit addresses, rather than store a full 3 
> bytes for each.

Ahem, 4 bytes.

In article <40B1B407.7020902@...>,
   Richard Gellman <splodge@...> wrote:
> >>Note that contrary to the expected behavior, the data is not 
> >>signalled by interrupts.
> >
> >I'd have to disagree there. A cursory disassembly of the IRQ handler shows
> >that messaging from the IO processor to the 2nd processor is done
> >exclusively with interrupts, and the high speed block data transfers with
> >NMIs.
> >
> Note aftwards I said "almost" all transfers :) 

S'pose it depends what you define as "almost all transfers", as in "almost
all of the operating system entry points" or "almost all of those by
frequency of use"
Sprow.