Date   : Sat, 31 Jul 2004 10:49:19 +0100 (BST)
From   : Pete Turnbull <pete@...>
Subject: Re: GoMMC and sideways RAM systems

On Jul 30, 23:23, Sprow wrote:
> In article <c0snf09e1r70umld3kghmnsggaeojtpvod@...>,
>    John Kortink <kortink@...> wrote:
>
> > The GoMMC code writes to the sideways ROM space it's in. Much
> > like anything could, were it in a 'standard' RAM bank (as in :
> > selected exclusively by ROMSEL).
> >
> > This presents no problems if ROMSEL is always used to point
> > to the read-enabled as well as write-enabled sideways RAM/ROM
> > bank. Simple SWRam systems and the Master SWR system use this.
>
> [snip]
>
> > Those who can't live with these two caveats, please steer clear
> > from GoMMC. No fix can and/or will be provided.
>
> I can't resist throwing two ideas in
>  a) The GoMMC firmware could supply a SRREAD/SRWRITE command
(compatible
>     with the Master) which does the sideways RAM write properly.
>
>     I can only think that boards like the excellent ATPL allowed the
>     ROMSEL bank to differ from the write bank so that they didn't
have to
>     waste a ROM slot with firmware/supply easy to lose disc programs.

That's kind of what it did.  You can only fit writable memory to one
bank, and any write to sideways RAM, regardless of the setting of
ROMSEL, writes into that.  They had the sense to provide connections
for a write-protect switch :-)

In fact it's possible to use a SPDT centre-off switch to make that bank
read/write, write-only, or disabled, and that's how mine are set up.

-- 
Pete                                           Peter Turnbull
                                               Network Manager
                                               University of York