Date   : Wed, 27 Oct 2004 10:57:34 +0100
From   : Richard Gellman <splodge@...>
Subject: Re: &D00

Richard Talbot-Watkins wrote:

>If it is possible to guarantee that no NMIs will be generated (for example,
>by 'turning off' the DFS via *TAPE or something), then it's OK to use this
>area.  For safety, it's worth putting an RTI assembly instruction at &D00
>itself (?&D00 = &40), so that if spurious NMIs are generated, there is a
>sensible handler for them.
>  
>
Eep! Don't want to RTI. On BBC Micros, there is almost never a need for
a user program to use RTI. The 6502 guns all NMIs through the NMI vector
address at the top end of the MOS ROM. This vector points to a location
in the MOS which in turn indirects through soft NMI vectors.

The MOS calls this vector  through a normal JSR-JMP construct[1], so
return should be by RTS, not RTI.

The difference between the two being of course that RTI also pops the
status register off the stack in addition to the return address.

The same applies for software interrupts (yes, the 6502 has them.. its
the BRK instructions) and IRQs. In fact, the 6502 sends IRQ and BRK
through the same ROM vector, then MOS distriguishes which it is, and
calls the appropriate software vector (BRKV. IRQ1V, or IRQ2V).  NMIs are
actually vectored slightly differently due to their nature. The MOS only
permits "registered" entry points to intercept NMIs, which is why only
the disk and net controllers use them (and also because they need to
respond to service requests regardless of CPU state).

[1] The JSR-JMP construct is a cunning way of implementing JSR (addr).
The basic code runs as follows:

Store JMP (addr) opcode (&6C):
LDA #&6C:STA &1000
Store the address:
LDA #LSBaddr: STA &1001
LDA #MSBaddr: STA &1002
Then JSR it:
JSR &1000

The JMP jumps to the code, but the RTS will return to the address the
JSR was called from.

-- Richard