Date   : Wed, 27 Jul 2005 23:02:49 +0100
From   : Phil Blundell <philb@...>
Subject: Re: Econet-Ethernet bridge

On Wed, 2005-07-27 at 19:10 +0100, Sprow wrote:
> In article <200507261649.j6QGnBW0062970@...>,
>    Eelco Huininga <eelco@...> wrote:
> 
> > True, but I do believe that 8-bit ethernet controllers will be available
> > for years to come, because the demand for these embedded controllers will
> > still be there.
> > An option might be to use an 'open-core' design written in VHDL:
> > http://www.opencores.org/projects.cgi/web/ethmac/overview
> 
> That's only the MAC, you need a PHY too. 
> Better to use a combined MAC/PHY, of which the CS8900 is a good choice (SMSC
> also do some in the LAN91C family).
> 
> Phil: I'm not convinced about the address decoding on the CS8900, surely
> it'll be permanently driving the bus?

The cs8900 is intended for direct connection to an ISA bus, so it does
its own I/O address decoding internally.  From power on, it will only
respond to I/O addresses 0x300-0x30f.  If nETHER_CS is high (either SRAM
or EGPIO selected), the address presented to the ethernet chip will be
forced to the 0x2XXX region and so it won't do anything.

The nCHIPSEL pin on the cs8900 is only involved in memory-mapped
operation, which isn't used here.

Or am I misunderstanding what you mean?

p.