Date   : Fri, 29 Jul 2005 13:22:35 +0200 (BST)
From   : Johan Heuseveldt <johan@...>
Subject: Re: Econet-Ethernet bridge

Hi,

On Fri 29 Jul, Mike Howard wrote:
> BeebMaster wrote:

> > I don't think the spare sockets on the Acorn Econet Bridge are for
> > "additional" RAM beyond the 8K it is meant to have.  I reckon that
> > the design was originally based around 4 2K RAM chips later replaced
> > by a single 8K RAM chip when they became more common/cheaper etc

It doesn't seem logical to me that only one of the four sockets could
be upgrade from 2K to 8K. Having only 8K puts restrictions on the
packet size. I think Mike got it right; see later.
But a good schematic would give the answer.

> > as with the original BBC OS which was 4 x 4K ROMs and later a
> > single 16K ROM.

Ah yes, all jumpers there.
  If you gave that a serious look, you'll notice that the system for
  selecting a SWRom, is 'kidnapped' for the (M)OS with 4 x 4K ROMS,
  now controlled by address lines A12/A13.

  The 4 sockets for SWRoms (IC52, 88, 100, 101) are then used for the
  MOS in 4 x 4K, and only a single SWR (possibly BASIC) was possible
  in the 5th socket (IC51), which normally is for the MOS 1.20 ROM.
  IIRC it was MOS 1.00 which was in 4 x 4K?
  (circuitry around IC76 and IC20)

  (all references to the BBC schematic)


> I'm no expert, as some of you will know :) but I was led to believe that 
> the memory was upgradeable, to allow larger packets to pass through?

Most likely. On the Beeb there is no limit on the size of a packet in
view of NFS. Of course the Beeb itself was a limiting factor on that. But
from the Tube side with some code of your own, or larger CoPro's, you
could make packets of, lets say, 100K, or whatever you or the application
software would fancy.

In RISC OS chunks (of a maximum?) of 8K are used, though I haven't
fully investigated this. It could be that this is Econet over IP only,
and native Econet is not effected by it. I certainly need to de some
more reading on this.

There was the *VIEW command [1] to watch the screen of another Beeb,
which data size could be 20K.
OK, most (school) network managers were not happy with it, I believe,
as it has a disastrous effect on Econet performance, and wouldn't
allow it.
But still, an 8K is limiting, as it also contains all the normal NFS
data for two 68B54 ADLCs, and some general OS functions I suppose.
Quite an achievement therefor!

No doubt the expectation was to have better ROM/RAM parts, and for better
prices real soon, which was taken into account in the PCB design.
At some time the price -  also in view of holding stock - for a single
8K RAM would be lower than four of 2K. As 8K seems a standard, the
switch was made from four 2K to one 8K. I wonder if there were ever
bridges sold which has the full 32K on board, right from start?


> I have two Acorn bridges, hard-wired and piggy backed together to form a 
> three-way bridge.

Let me see, if I can get this right: both bridges are connected together,
serving the second net. Then both bridges have their other connector to
serve the first and third net respectively? Is that correct?

(the following needs a monospaced font to be seen correctly)

  _________________
  |               |_________________  net '1'
  | Bridge "A"    |____
  |_______________|    |
                       |____________  net '2'
  _________________    |
  |               |____|
  | Bridge "B"    |_________________  net '3'
  |_______________|


Did you make a (new/other) case for it, or did you perform a modification?
Pictures please! :-)


> One of these has had it's memory upgraded.

The 2K RAM devices are 24 pins, while the 8K are 28 pins. This means
that the +5V supply needs to be switched from socket pin26 to socket
pin28. Is this taken care of by a jumper setting, or is a modification
necessary?
Another, or two (depends on the TTL logic used), jumper(s) is/are used to
reroute the address lines. In the 4 x 2K, A11/12 would select one of the
RAM chips, while in 4 x 8K these lines can go to each RAM chip directly,
and A13/14 will do the chip selection.

Technically the following is possible:
    In this 32K (4 x 8K) environment it's still possible to use the
    A11/12 for selecting the RAM chip, thereby deviding each 8K RAM
    chip in four 2K fragments by A13/14, mapped in the 32K area.
    This scheme is simpler for the PCB layout, but wouldn't allow a
    single 8K RAM to be used, as the four 2K areas of every RAM chip
    are scattered over the 32K area.

>From what I have understood so far, a single 8K is possible, invalidating
this possibility.

Have you done the 32K upgrade yourself? Could you tell me if a
modification for the +5V is needed, or is it just an issue of jumpers,
whether soldered or a real jumper?


  Somewhere, deeply tucked away, I must have this bridge. I'll start
   looking for it. I seem to remember it has four RAM chips, most
   likely as 4 x 2K.
  Then I need four 8K RAM chips, so need to do searching ...


 [1] When the word processor 'VIEW' came out, the *command for
      selecting it, couldn't be *VIEW, so *WORD was chosen for that.


greetings,
Johan

-- 
Johan Heuseveldt <johan@...              >
  aka  waarland

  The best place is a Riscy place
 
If in doubt, make it sound convincing.