Date   : Thu, 11 Aug 2005 20:33:48 +0100
From   : jgh@... (Jonathan Graham Harston)
Subject: Re: 80186 co-pro

Sprow <info@...> wrote:
>  a) emulate the 6502 tube/65C102 turbo as required in software on the
>     ARM. At 75MHz you should be able to at least achieve 10MHz, allowing
>     7 ARM instructions to emulate each 6502 opcode
      ie, 4 per fetch, average 3 per opcode handler
 
>   loop:
>   LDRB   opcode,[fakepc],#1
>   ADD    PC, PC, opcode LSL#2
>   B      opcode0
>   B      opcode1
>   :
>   B      opcode255
> 
>   opcode0:
>   ; handler
>   B      loop
 
Seven ARM instructions? Hah! I can do it in six, 3 ARM
instructions plus one memory fetch per emulated fetch:
 
.loop
LDRB   opcode,[fakepc],#1
LDR    PC, [PC, opcode LSL#2]
EQUD   0 ; Skipped by pipeline
EQUD   opcode0
EQUD   opcode1
:
EQUD   opcode255
 
.opcode00
; handler
B      loop
 
Or even in five, just 3 ARM instructions per emulated fetch:
 
.loop
LDRB   opcode,[fakepc],#1      ; Get opcode, increment fakepc
ADD    pc,pc,fakepc,LSL #6     ; Jump to here+4+opcode*64
EQUD   0                       ; Skipped by pipeline
.opcode00
; implement opcode &00
B      loop
; ALIGN to 64 bytes
.opcode01
 
etc...
 
-- 
J.G.Harston - jgh@...                - mdfs.net/User/JGH
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