Date   : Fri, 04 Nov 2005 19:33:23 -0000
From   : "David Harper" <dl.harper@...>
Subject: Re: BBC using 3.5 high density format

"Jonathan Graham Harston" wrote:

>> > However, the BBC Master runs at 3MHz, so a 41-cycle NMI routine
>>
>> Perhaps you're confusing the Master 128 with the Turbo or a 6502 Second
>> Processor.  The second processors do run at 3MHz, but the CPU and DRAM
>> clock in the Master is only 2MHz.
>
> New Advanced User Guide, p30:
>
> "1 instruction cycle=0.5us in a BBC model B, 0.33us in Master or
> 6520 2nd processor, 0.25us in a Master Turbo 2nd processor"
>
> but...
>
> The Advanced Reference Manual for the BBC Master, p19:
>
> "processing is done at 2MHz"
>
> which is confirmed by the cuircuit diagram showing phi2 being fed
> from 2M on the Video processor.

It has to be 2MHz. The DRAM runs at 4MHz, and it is accessed on alternate 
cycles by the CPU and the video system to maintain the display. (If you work 
out the rate the video system needs to access memory, you find that (at 
least in Modes 0 to 3) it cannot be slower than that. A 256-line, 80-byte 
per line, 50Hz display would work out at just 1MHz if it was evenly spaced, 
but that does not allow for retrace intervals.) Because of this, the CPU can 
only access the DRAM at 2MHz. Since the co-pro RAM is only accessed by the 
CPU, it can be clocked at 3, or indeed 4MHz, without problem.

David Harper