Date   : Sat, 03 Dec 2005 13:04:30 +0000
From   : Richard Gellman <splodge@...>
Subject: Re: ?Shadow RAM point

Peter Craven wrote:

> Hi
>  
> Just trying to clarify re: Shadow RAM usage.....
>  
> If have Shadow RAM on BBC/ Master as being displayed, what happens if 
> you are entering a BASIC program that goes over &3000, as the computer 
> would have to swap the 'Non-Shadow' User memory back in to store the 
> program?????
>  

You are still proceeding from the idea that there is only one Shadow RAM 
paging mechanism ;)

Inside yon BBC Micro is a circuit (in the master this is a chip) called 
the CRTC MUX. This swaps the RAM's address bus between the CPU and the 
CRTC, the the RAM's data bus between the CPU and VIDPROC/SAA5050 (teletext).

Thus there are effectively two systems accessing the RAM. The 2Mhz clock 
is inverted by timing circuitry such that the video system accesses the 
RAM when the CPU has finished, and vice versa.

Now, there are two bits in ACCCON that control which RAM bank is used 
during the CPU side of the 2Mhz clock. One selects shadow RAM at all 
times, and the other selects shadow RAM when the VDU code line is 
asserted (it is asserted when the CPU's instruction fetch line is 
asserted, and the address bus contains a value within the VDU code of 
the MOS ROM, and deasserted when the address bus is outside that range).

Because these accesses are on the CPU side of the clock, the video 
access is unaffected. During the next 2Mhz inverse clock (while the CPU 
is busy), the CRTC MUX switches the RAM address bus to connect to the 
video circuitry, and uses the third ACCCON bit to seleect which bank to 
connect.

Thus reading/writing to the screen memory is independent of displaying it.

Hope this clarifies things :)

-- Richard