Date   : Thu, 09 Mar 2006 19:03:12 +0000 (GMT)
From   : Sprow <info@...>
Subject: Re: Warning: Sad case on list!

In article <9210121048nc9lso7ul5iev9to01pipj6u@...>,
   John Kortink <kortink@...> wrote:

[fractal times]

> >4 mins 33 secs on ARM7 coprocessor, it's a useful benchmark program to
> >have actually as I've got some space left in the FPGA so could make 
> >the FIFO for OSWrch deeper to improve parallel execution.
>
> The depth of that FIFO won't matter too much, probably.
> The ARM side will be waiting for 'slomo' to draw things
> most of the time anyway. Saving a few cycles just on
> getting the VDU bytes through won't make that much of
> a difference.

If I take out the line with the PLOT/MOVEs on it goes down to 43 secs, so
the other 3 mins 50 secs must be spent waiting for the beeb to plot it - in
which case I would tend to agree in this example it's probably only going to
dint the time.

Ideally it would take (4m33s - 43s) such that it just boiled down to the
slower of the two machines' time,
Sprow.