<< Previous Message Main Index Next Message >>
<< Previous Message in Thread This Month Next Message in Thread >>
Date   : Fri, 31 Aug 2007 21:35:25 +0200 (BST)
From   : johan@... (Johan Heuseveldt)
Subject: Econet oddities

Hi Chris,

On Wed 29 Aug, Chris Priest wrote:

[snip]

> I am using an American Clock, the black box with white label on it etc, 
> symmetrical, also wondered if this might cause an issue as well.

Yes, it could be. Not as such, but...

The clock for the network is also used for internal processing of
the ADLC 68B54; both edges - falling & rising - are used.

There are several different ADLC 68B54 manufactured by Motorola. Newer
batches/series came from a different mask. These masks are numbered and
printed on top of the ADLC. I'm not sure about the other, non-Motorola
brands of chips. Perhaps they've always used the same (older) mask???

In general - as originally developed, the clock signal is of 50/50 duty
cycle, meaning the time high is equal to the time low.

The problem is that ADLCs from newer masks, have problems with that for
the internal processing. When the falling edge is earlier, the ADLC has
more time for that processing. This will occur with a clock having a
shorter first half, and a longer second half. This has introduced the
MARK and SPACE times of the clock signal. The clock box ISS 2 can be
used like that.

Sometimes the SPACE is meant in addition to the MARK time, sometimes it is
the TOTAL time of the clock signal.

Wanting to have - let's say - a 200 kHz clock, the total time for
the HI and LO phase together is 5 micro seconds (us). The MARK period
can then be set as 1 us, leaving 4 us for the SPACE period.
(Total and SPACE time get sometimes mixed up)


The problem is that American clock box: ONLY 50/50 duty cycle clocks
can be setup.

Perhaps you can try a rather low speed, giving the ADLC more absolute
time during the second half of the clock cycle. Or try a more modern clock
box like Acorn's ISS 2 (black with green print) or SJ.

And check all the masks of the ADLC 68B54's concerned.


The mask can be found underneath the chip ID, just before the code of
manufacturing date. E.g. 

     (M)
  MC68B54P
  N6R 8326

means, the chip is from week 26 in 1983. The 'N6R' part is the mask number.

I think this '6' is a 'new' one.
A '5' - but also different letters before/after - is an older mask,
suitable for symmetric (=50/50%) clocks?

It's a rather long story, sorry, but I hope it's clear enough.



Greetings,
Johan

-- 
Johan Heuseveldt <johan@...              >
  aka  waarland

  The best place is a Riscy place
 
So far as I can remember, there is not one word in the
Gospels in praise of intelligence. - Bertrand Russell
<< Previous Message Main Index Next Message >>
<< Previous Message in Thread This Month Next Message in Thread >>