Date   : Sun, 17 Feb 2008 11:10:28 +1100
From   : richard@... (Richard Wilson)
Subject: BBC FPGA Boots to BASIC... almost...

 

> > As far as I was aware though, the vsync interrupt _did_ 
> occur at the 
> > start of vsync, rather than the end...
> 
> Not according to the schematics...

The VSYNC from the CRTC is directly connected to CA1 of the SYS VIA. You can
reprogram the VIA to interrupt on the leading or trailing edge of CA1, and
in fact the OS does set it to interrupt on the leading edge.

Richard