Date : Tue, 18 Mar 2008 21:12:33 +0100 (GMT)
From : johan@... (Johan Heuseveldt)
Subject: New 6809 TUBE, was: TUBE chip, accessing 'Parasite' side
Hi all,
On Sun 16 Mar, Johan Heuseveldt wrote:
[snip]
> I would like ask you foulks some other questions, and wonder if a new
> subject is appropriate: further questions will have little to do with the
> access issue discussed so far. My main concern is not poluting the thread,
> but also not being rude to the archiving system.
OK, I hope it is ok. I changed the subject with a more general description
for the 6809 2nd-Processor design. I did so by replying on my own post, so
the relation to the previous thread is kept.
Type of IC family
~~~~~~~~~~~~~~~~~
I'm not sure what family of IC's I can use HC or HCT. Normally I would expect
HCT, as the NMOS 6809 is TTL compatible, TTL only. Not sure how to interpret
that. But reading some details about these HC/HCT families, the difference is
certainly not as much as with the CMOS 4000 family.
I need two seperate latches/registers for bank switching, both two bits in
size. An 75 is available in both HC and HCT. But being a transparent latch,
it needs an active high signal, while it is better to use a active low
signal. When inactive, a high signal is very much unsensitive for noise.
A newer 77 is only available in HC, but has the same signal level problem.
A 175 is usable, although the double latch outputs are not necessary. But
it does use a more normal low active pulse, so the positive edge is used
to clock the data into the latches, keeping the inactive state of the signal
level to high, which is prefered.
There's a 375, but this one is again a transparent latch with a low
inactive signal. Again, perhaps not ideal. Also HC only.
A 379 is another good one, although again with both Q and nQ outputs, which
are not necessary. But these ones are also HC only.
Another issue is the actual availability of all of them. In the end it
could be that only a 174 is the one that could actually be obtained, apart
from the more usual 8 bits variants.
Sometimes the several design options don't allow for two seperate bank switch
registers, as I'm running out of GAL in- and outputs. In fact I also need
three other bits for the (HardWare) vector selection, so everything fits well
into a single 8bits register. From a software point of view this is a bit
clumsy though. The 'truth' is somewhere in the middle I suppose! :-)
So I'll probably stick to the use of two registers, both preferable being
4 bits wide. It could mean I'll use a 6 bits 174.
I think the GALs are also fully TTL compatible, so considerations are:
* the proper IC family is possibly HCT anyway?
* it's probably not good to mix HC and HCT?
* availability could force me to use a more standard chip like the 174?
Wel, what do you folks think?
greetings,
Johan
--
Johan Heuseveldt <johan@... >
aka waarland
The best place is a Riscy place
It is better to kiss an avocado than
to get in a fight with an aardvark.