Date   : Tue, 18 Mar 2008 21:12:55 +0000
From   : pete@... (Pete Turnbull)
Subject: New 6809 TUBE, was: TUBE chip,

On 18/03/2008 20:12, Johan Heuseveldt wrote:

> I'm not sure what family of IC's I can use HC or HCT. Normally I would expect
> HCT, as the NMOS 6809 is TTL compatible, TTL only. Not sure how to interpret
> that. But reading some details about these HC/HCT families, the difference is
> certainly not as much as with the CMOS 4000 family.

Basically, the upper/lower thresholds on HC inputs are symmetrical, like 
most CMOS (eg 4000-series) while the thresholds on HCT match normal 
TTL/LSTTL.

> I need two seperate latches/registers for bank switching, both two bits in
> size. An 75 is available in both HC and HCT. But being a transparent latch,
> it needs an active high signal, while it is better to use a active low
> signal. 

Um, perhaps you've just not written that the way I'd expect to hear it, 
but it latches when the enable is low; the output tracks the input when 
the enable is high.

> When inactive, a high signal is very much unsensitive for noise.

I'm not sure what you mean here, and the input impedance of HC or HCT is 
high enough that there's little difference in sensitivity to high versus 
low.  Besides, so long as the input is connected to something active, it 
won't matter.

> A newer 77 is only available in HC, but has the same signal level problem.

Yes, it's a '75 without the not-Q outputs which are available on the '75.

> A 175 is usable, although the double latch outputs are not necessary. But
> it does use a more normal low active pulse, so the positive edge is used
> to clock the data into the latches, keeping the inactive state of the signal
> level to high, which is prefered. 

Yes, it's a D-type flip-flop, not a transparent latch like the 75/77. 
It's edge-triggered, which latches are not.

> Another issue is the actual availability of all of them. In the end it
> could be that only a 174 is the one that could actually be obtained, apart
> from the more usual 8 bits variants.

Again, the 174 is a D-type flip-flop, not a latch.  Also 
positive-edge-triggered, like the 175; in fact the 175 is just a quad 
version of the (hex) 174.

All the latches/flip-flops in the chips you've listed have a common 
clock, so you can't clock two bits in any of them without clocking the 
other bits at the same time.  You wrote that you need two 2-bit latches; 
if they need to be capable of being clocked separately, you need two 
chips anyway.  If so, why not use a pair of 74HCT74s?  Each is a dual 
D-type flip-flop, and they're readily available and cheap.

HCT173 also exists, it's a tri-state quad D-type.  Or cheat and use an 
HCT161: you can set it up so it does a parallel 4-bit load on the clock 
transition, without counting (Acorn used an LS163 to do this in the 
Beeb's ROM select circuit) -- if either of the two count enables are 
low, counting is inhibited, and the parallel inputs are latched and 
transferred to the outputs when the Parallel Enable transitions from 
high to low.

Or just use half of an HCT273 (flip-flops), HCT373 (latches), HCT374 
(flip-flops), HCT573 (latches), or HCT374 (flip-flops).  All common.

> I think the GALs are also fully TTL compatible, 

Yes.

> so considerations are:
>  * the proper IC family is possibly HCT anyway?

Yes.

>  * it's probably not good to mix HC and HCT?

No, the thresholds are different, but it will usually work.

-- 
Pete                                           Peter Turnbull
                                               Network Manager
                                               University of York