Date   : Sun, 31 Aug 2008 11:29:31 +0200
From   : kortink@... (John Kortink)
Subject: FRAM....

On Sun, 31 Aug 2008 01:23:47 +0100, "Mark Haysman" wrote:

>Aha...gotcha! Damn 2MHz and it's timing.....
>
>So...being a fan of diodes, and a loather of piggybacking, I tried rigging 
>it like this:
>
>On the FRAM, break the connection between pin 20 of the chip and the socket. 
>Pull pin 20 of the chip low with a 4k7 and connect two diode (1N4148) 
>cathodes to it. Connect the anode of one to pin 20 of the socket, and the 
>other anode to pin 22. Thus creating an OR gate validating pin 20 with pin 
>22, which has the 2MHz bus signal encoded in it.

Do note that while nOE is active for both reads and
writes on model B and Master, it is only active for
reads on the B+, so you can't use this diode based
fix on the B+.


John Kortink

-- 

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