Date   : Thu, 06 Nov 2008 23:48:50 +0000
From   : jgh@... (Jonathan Graham Harston)
Subject: 6502 second processor memory map.

Phill Harvey-Smith wrote:
> But I'd like to make it as close in logical terms to the Acorn unit as
> possible as this will make debugging it much easier and will also help
> ensure compatibility with already existing software.
 
The 6502 CoPro memory map is very simple, and can be implemented in
two or three ICs if static RAM is used.
 
0000-FFFF 64K of RAM
FEF0-FEFF Tube I/O registers
F800-FFFF 4K of ROM
 
On RESET, ROM is readable everywhere in memory. Writes write to RAM
or Tube I/O. An access to a Tube I/O register causes ROM to be
paged out and RAM to be paged in.
 
The startup code in the Tube MOS copies the MOS code from ROM to
RAM, and then accesses the Tube registers to complete the host-Tube
startup sequence. That Tube access pages the RAM in.
 
> srams lying around. Also I'm going to have to implement communication
> with the BBC by some other method other than the Tube IC.
 
Again, best to make accessing whatever commication device you use
pages the ROM out and the RAM in. For instance I have written 6502
and Z80 Tube client code that communicates with the host via a
serial port (<http://mdfs.net/tube>). Note that if you do chose to
use a method other than the standard Tube I/O, you will need a
matching host program on the other side. The default Tube host
talks via the Tube registers using Tube I/O protocol.
 
It is possible to implement something that looks like a Tube device
without using a Tube ULA with a handful of latches and stuff.
 
-- 
J.G.Harston - jgh@...                - mdfs.net/User/JGH
05:10:36, 18-Nov-2008 - RISC OS time rolls over to &5000000000