Date : Fri, 14 Nov 2008 00:49:45 +0000
From : afra@... (Phill Harvey-Smith)
Subject: [Fwd: Re: 6502 second processor memory map.]
Dammit, this reply was supposed to go to the list !
Jonathan Graham Harston wrote:
>> Message-ID: <49110179.7090607@...>
>
> The 6502 CoPro memory map is very simple, and can be implemented in
> two or three ICs if static RAM is used.
>
> 0000-FFFF 64K of RAM
> FEF0-FEFF Tube I/O registers
> F800-FFFF 4K of ROM
Cheers that comfirms what I had gathered from the circuit diagram, and
your rom listings.
> On RESET, ROM is readable everywhere in memory. Writes write to RAM
> or Tube I/O. An access to a Tube I/O register causes ROM to be
> paged out and RAM to be paged in.
>
> The startup code in the Tube MOS copies the MOS code from ROM to
> RAM, and then accesses the Tube registers to complete the host-Tube
> startup sequence. That Tube access pages the RAM in.
Ahh, makes sense though I thought that the rom perhaps only overlaid the
top 2K of ram, I don't suppose it would matter if that was the case,
especially as I have the source so can re-assemble, to suit the hardware
implementation.
>> srams lying around. Also I'm going to have to implement communication
>> with the BBC by some other method other than the Tube IC.
>
> Again, best to make accessing whatever commication device you use
> pages the ROM out and the RAM in. For instance I have written 6502
> and Z80 Tube client code that communicates with the host via a
> serial port (<http://mdfs.net/tube>).
Ahh, I saw the Z80 one, but not the 6502, a link to that may save me
some time.
> Note that if you do chose to
> use a method other than the standard Tube I/O, you will need a
> matching host program on the other side. The default Tube host
> talks via the Tube registers using Tube I/O protocol.
Indeed, I believe that the source to the standard BBC end tube code is
also on mdfs.net, which would be a good starting point. You didn't
happen to also write the Beeb end of the serial communications did you ?
If so would you be prepared to make that available ?
BTW I have converted the 6502 second processor code so that it will now
assemble correctly with BeebAsm, you are welcome to a copy for your
site, (and any more I convert from there do in the future).
> It is possible to implement something that looks like a Tube device
> without using a Tube ULA with a handful of latches and stuff.
Current plan is to use a CPLD to do the address decoding and tube
buffering, currently I have a Xilinx PLCC 84 with pins to spare, I was
thinking to perhaps have one register in each direction and use your
serial protocol (or a version of it).
Cheers.
Phill.
--
Phill Harvey-Smith, Programmer, Hardware hacker, and general eccentric !
"You can twist perceptions, but reality won't budge" -- Rush.
--
Phill Harvey-Smith, Programmer, Hardware hacker, and general eccentric !
"You can twist perceptions, but reality won't budge" -- Rush.