Date   : Thu, 19 Mar 2009 09:45:58 +0000
From   : splodge@... (Richard Gellman)
Subject: Hardware questions

Hi, 

I have a couple of hardware questions of an Acorn nature... :) 

1) I'm looking at building a device for the 1Mhz bus that would require
access to a memory map. I've consulted with the Master 128 Reference Manual
Part 1 and the Advanced Reference Manual, but they are a bit vague
concerning the use of FDxx as a 256-byte block of RAM, suggesting that FDFF
is *always* a paging register. 

The question is, if I implement some control logic somewhere in FCxx, is
it permissable to use the whole of FDxx as a 256-byte page window, and
implement my own paging register in FCxx ? Or is there some hard-wiring
that already implements a paging register in FDFF and FCFF ? 

2) Is there available anywhere a circuit diagram of the Electron Plus 3
Disk Interface ? 

Ta. :) 

-- Richard