Date   : Thu, 19 Mar 2009 14:17:06 +0000
From   : splodge@... (Richard Gellman)
Subject: Hardware questions

On Thu, 19 Mar 2009 10:45:13 +0000 (WET), Peter Coghlan
<Peter.Coghlan@...> wrote:
> My memory (pun not intended) is not the best and it's been a long time
> since I looked at this but I thought the idea was that FD00-FDFF was
> supposed to be a 256 byte wide window on up to 64KB of memory with the
> paging register at FCFF. I don't think it makes much sense to have a
> 255 byte window and one byte taken up by a register - it would make
> using the memory very difficult.

I totally agree. However, in the reference manuals it describes a paging
register being (or potentially being) at both FCFF and FDFF, as if a device
may potentially ignore or logically OR NPGFC and NPGFD to make the register
appear in both locations.

> 
> I suspect the only reason that Acorn specified a location for the
> paging register is in order to declare a standard so that different
> people didn't pick different random locations for it.
> 
> If you plan to implement a block of paged memory in page FD, I would
> suggest you consider other items you are likely to have connected to
> the 1MHz bus at the same time and pick the location of the paging
> register to avoid conflicting with them. It may also be useful to
> look at existing implementations of what you plan to do (if any
> exist) and try to emulate what they did (assuming no conflicts with
> other stuff you plan to use) for software compatibility reasons.

My plan was to having an enable/disable latch at one location, followed by
the paging register. Somewhere out of the way in one of the "reserve for
user application" spaces.

> As far as I recall there is something like JMP (&FDFE) in the OS ROM
> which I believe is there to facilitate the use of Acorn diagnostic
> hardware. This probably means that in the unlikely event that you
> have access to Acorn diagnostic hardware, you wouldn't be able to
> use it at the same time as your memory expansion was connected.
> This does not seem a likely problem. :-)
> 
> As far as I know, there are no other references to particular locations
> in pages FC and FD in the OS and it is just a matter of making sure
> you don't try to use the same locations for two incompatible purposes
> at the same time.
> 
> I don't know of anything in the unexpanded beeb hardware that acts on
> reads or writes to pages FC or FD.

I'm not certain either, but the custom chips in the Master 128 could be
implementing anything in there.. I know one of them houses ROMSEL and
ACCCON along with the I/O controller (removing the need for a 74259 IC or
two), so I could easily believe Acorn might implement some kind of
write-through latch there. The reference manuals are quite insistent that
thats what FCFF and FDFF are used for.....

-- Richard