Date   : Mon, 05 Nov 2012 14:19:58 -0600
From   : jules.richardson99@... (Jules Richardson)
Subject: 6502 timing and zero-page instructions

On 11/05/2012 04:41 AM, Ed Spittles wrote:
> Hi Jules,
>     The PC is generally incremented: the other possible actions are to leave
> it alone, and to reload it.  The logic for this is quite complex - I wrote
> something about it here:
> http://visual6502.org/wiki/index.php?title=6502_increment_PC_control
> but the conclusion is that your first tabulation is right: the PC is
> incremented for each operand.  The 6502 has to make a hasty decision not to
> increment the PC when it fetches an opcode which has no operand: the PC was
> already incremented, but that's fine because it's correct to be used to
> fetch the next instruction - unless it's about to be reloaded.

Hmm, so potentially PC might be incremented twice in a single cycle:

   cycle0: increment PC if previous instruction didn't modify PC directly
           and previous instruction had an operand
           fetch opcode
           increment PC only if opcode has an operand

   cycle1: fetch operand
           increment PC only if operand takes 2 bytes

   cycle2: fetch operand

   ...

?

cheers

Jules