Date   : Tue, 05 Mar 2002 23:16:03 -0000
From   : "Richard Gellman" <r.gellman@...>
Subject: Re: Xfer

>Not quite.  You'd have to enable one / disable the other.  The two chips
>live at different addresses.

Thats what the chip select line does. The 8271 and the 1770 both have an
input marked as "(not)CS".
(not) is represented by a bar over "CS". This means the chip is selected
when that line is low.
Normally, its connected to the Acorn IO Controller chip, which is a custom
chip (at least in the master, it may be "manual" circuitry in the model B),
which provides chip select line outputs depending on the address the
processor is trying to read/write. As both controllers reside at the same
address, and the 1770 uses 1 less address than the 8271, there's no problem
with "partial selection", i.e. if the controller didn't pick up on say FE84
because it was outside the register range of the other chip. Any chip that
has its chip select high, will not respond to processor bus activity. The
only concern may be either of the chips responding to drive signals
independently of the controller, but that can be resolved with a couple of
high-speed bi-directional buffers with enable lines connected to the
switched chip select outputs.

>> The only other problem you would encounter, is having to switch DFS ROMs,
>as
>> the 8271 and the 1770 are accessed completely differently.

>You don't have to do that, and in fact you'd not want to.  Each DFS can
>recognise it's own controller, and will remain dormant if the controller
>isn't present at boot time.  You wouldn't want to disable the 1770 DFS
>completely as it includes some of the sideays RAM code, and probably the
>Tube code (though if your 8271 DFS was actually a DNFS ROM, that includes
>Tube code too).

See a previous post. For the Acorn chips this is pretty much true, but
non-Acorn DFSes tend be slightly quirkier, and not following the rules :)

-- Richard Gellman

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