Date   : Sat, 30 Mar 2002 20:15:17 -0000
From   : "Richard Gellman" <r.gellman@...>
Subject: Re: Circuits involving a SAA5050?

>You'll need:
>Once per frame:
>  HSync, reset address to memory start.  (Use &0000 if no hardware scroll)
>Once per line:
>  VSync, increment pixel line, from 0...9
>After VSync, wait 12/13/14us for start of lefthand displayed area
>Every 1us within each line:
>  perform a "Read" operation on RAM, then increment address
>  A single screen line takes 64us, each displayed character takes 1us, the
>  displayed part of the screen takes 40us.
>
>Each line is scanned ten times, with the pixel-line incrementing from 0 to
>9, so the addressed memory will be:
>
>VSync, 0, 1, 2, 3, ... 38, 39, VSync, 0, 1, 2, 3... 38, 39, VSync
> ten times then...
>VSync, 40, 41, 42, 42 ... 78, 39, VSync, 40, 41, 42, ... 78, 79,
> etc...

You're confusing HSync and VSync. VSync is at the end of a frame, HSync is
at the end of a line.
Not important for descriptive purposes above, but kinda good to know when
looking at chip datasheets :)

-- Richard Gellman

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