Date   : Sat, 30 Mar 2002 10:57:05 +0000
From   : jgh@... (Jonathan Graham Harston)
Subject: Re: Circuits involving a SAA5050?

"Kris Adcock" <krisa@...> wrote:
> The /output/ of the 5050 goes through the CRTC. I'm more interested in what
> is providing the character bitpattern going /into/ the 5050, as I had always
> been under the impression that the characters were stored in the chip
> itself.
 
The output of the 5050 goes direct to the video circuitry.  The input of
the 5050 comes from the video RAM.
 
The CRTC is programmed to cycle addresses through the 1k of teletext
video ram at &7C00 to &7FFF through each character.
 
The CRTC accesses each byte of data at the relavant time and signals a
"memory read" to the RAM and that tells the 5050 that data will be
available.
 
The 5050 reads the byte from the data bus.
 
The 5050 uses this byte to index into it's character ROM (inside the
5050!) offset with an internal pixel line counter to fetch the bit-pattern
for this location on the screen.
 
The 5050 converts this bit-pattern into 6 bits of serial video data and
sends it out through it's Red, Green and Blue output pins.
 
The CRTC also tells the 5050 when the screen starts with the Horizontal
Sync signal and when each line starts with the Vertical Sync signal (so it
can set defaults at the start of each line).
 
The RAM is addressed by the CRTC, *not* the 5050.  The 5050 is a data-bus
watcher, and just scoops up the bytes that get placed onto the databus.
 
The character data is held within the 5050.  There are several varieties
of 5050 that have different character ROMs for different character sets,
eg, Cyrillic, German, Swedish, etc.
 
The 1k of memory addresses by the CRTC contains teletext ASCII character
codes.  Bit 7 is ignored, so a byte &01 in memory is the same as a byte
&81 in memory - TextRed.
 
The BBC's VDU drivers only poke character data to video ram for VDU codes
32+, which is why VDU 129 is TextRed.  Try ?&7C00=1 in the i/o in a
non-shadow MODE and you'll see that it puts a TextRed code into the
screen.
 
The CRTC's function in providing RAM addressing can be replaced with some
generic timing circuitry.  Check the specifications for MODE 7 in one of
the Advanced User Guides and design something that provides the same
signals.
 
You'll need:
Once per frame:
  HSync, reset address to memory start.  (Use &0000 if no hardware scroll)
Once per line:
  VSync, increment pixel line, from 0...9
After VSync, wait 12/13/14us for start of lefthand displayed area
Every 1us within each line:
  perform a "Read" operation on RAM, then increment address
  A single screen line takes 64us, each displayed character takes 1us, the
  displayed part of the screen takes 40us.
 
Each line is scanned ten times, with the pixel-line incrementing from 0 to
9, so the addressed memory will be:
 
VSync, 0, 1, 2, 3, ... 38, 39, VSync, 0, 1, 2, 3... 38, 39, VSync
 ten times then...
VSync, 40, 41, 42, 42 ... 78, 39, VSync, 40, 41, 42, ... 78, 79, 
 etc...
 
 
Detailed examination of the BBC circuit diagram and the MODE 7 CRTC
programming data is very enlightening.
 
Some years ago I draw up a circuit for an add-on teletext card for a
Spectrum, that I never got around to building.
 
If you've any more questions, I can probably answer them, but it takes me
some time to get around to reading postings...
 
-- 
J.G.Harston (JGH BBC PD Library) 70 Camm Street, Walkley, SHEFFIELD S6 3TR
jgh@...                - Running on BBCs & Masters with SJ MDFS FileServer
Z80+6502/CoPro+Tubes/Econet+SJ - - - - - - - http://www.mdfs.net/User/JGH/
 Never, ever, EVER, *EVER*, *E*V*E*R* use an apostrophe to make a plural