Date : Sun, 14 Mar 2004 23:22:01 GMT
From : "Thomas Harte " <thomasharte@...>
Subject: Re: CLI then SEI
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According to 64doc, the 6502 documentation that comes from the Commodore
64 emulator and Program
Development System, and a document that those of us who deal with Electrons
may be more accustomed to than
BBCs as it is the only documentation I've ever seen on exactly what the 6502
does every single cycle:
"The NMOS 6500 series ... use a sort of pipelining. If an instruction does
not store data in memory on its last
cycle, the processor can fetch the opcode of the next instruction while executing
the last cycle.
..
The processor will ... wait for the current instruction to complete before
executing the interrupt sequence. To
process the interrupt before the next instruction, the interrupt must occur
before the last cycle of the
current instruction."
I've cut a little there about the special case of BRK.
Timing for implied addressing operations:
"
# address R/W description
--- ------- --- -----------------------------------------------
1 PC R fetch opcode, increment PC
2 PC R read next instruction byte (and throw it away)
"
Therefore, as far as I can tell, a CLI/SEI pair should result in the following:
1) read cli instruction
2) read sei instruction, clear interrupt flag
3) spot pending interrupt, wait for end of sei to execute it
4) complete sei
Implied by that, shouldn't cli/sei (with interrupt pending) result in an
interrupt in which the P left on the stack
has the I flag set? In which case you get the 'interrupt after the instruction
after' behaviour that Tom notes,
whilst maintaining the behaviour jgh mentions (i.e. cli/sei used to let in
a single interrupt) whilst suggesting a
new emulator bug which might have been preventing Empire Strike Back from
executing correctly? Has the
interrupt routine been checked to see that it isn't just trivially rejecting
any interrupt that leaves a P with I
set on the stack?
-Thomas
P.s. please ignore my earlier post about the 6502 test suite, I've spotted
the correct earlier message now.
From: jgh@... (Jonathan Graham Harston)
Date: 10 Mar 2004 10:29:33 +0000
Subject: [BBC-Micro] Re: CLI then SEI
tom@... wrote:
> But on a real BBC, it seems there's some kind of pipelining-like
> behaviour going on. After a bit of playing around, I found that the
> interrupt doesn't happen until after the instruction following the
> CLI has run! So a CLI/SEI pair won't cause an infinite chain of
> interrupts, though a CLI/NOP/SEI will. (The address on the stack on
> entry to the IRQ routine is the instruction after the instruction
> after the CLI.)
>
> Very strange.
>
> Should I have known this already?! :)
Only you have Z80 programming experience where this behavious is clearly
and repeatedly documented. I have never seen this documented for the
6502, but I have often seen the CLI/SEI sequence used to allow one
interupt in.
Lycos EMail has 10 MB of storage space. http://mail.lycos.co.uk
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