Date   : Mon, 24 May 2004 08:31:36 +0100
From   : Sprow <info@...>
Subject: Re: Tube / Master Coprocessor question

In article <40B120C0.6010807@...>,
   Richard Gellman <splodge@...> wrote:
> The tube is an asynchronous dual CPU interface. Whats actually happening 
> is two CPUs running as two independnt systems, with a chip inbetween 
> (The TUBE, found typically in the second processor box)

The Tube, as you point out, is the interface specification, not the name of
the chip.

> Note that contrary to the expected behavior, the data is not 
> signalled by interrupts.

I'd have to disagree there. A cursory disassembly of the IRQ handler shows
that messaging from the IO processor to the 2nd processor is done
exclusively with interrupts, and the high speed block data transfers with
NMIs.

Maybe you were talking about the host not the parasite?
Sprow.