Date   : Wed, 27 Oct 2004 13:54:19 +0100
From   : Richard Gellman <splodge@...>
Subject: Re: &D00

>Eh ? There's no soft vector anywhere in NMI handling.
>NMI jumps to (&FFFA) which is &0D00 on both BBC and
>Master.
>
>  
>
Ok, I'll confess to not actually looking too deeply into this one. I 
know that BRK/IRQ does use soft vectors (tho IRQ1V I wasn't aware was 
directly called from the hard vector), and I assumed that NMI used a 
similiar system, on the basis that looking through the ROM messages 
(master ref. man pt 1) shows a number of calls for claiming/releasing 
NMI, and the description of that memory area as (quote) "You can not use 
this area unless you have claimed NMI". From this I assumed the MOS must 
be doing something vectoresque to control NMI flow.

I shall gladly submit to a more in-depth correction however :)

>
>I don't know, cunning ? A well known, better (memory frugal,
>shorter, faster, ...) way is :
>
>LDA #MSB(addr - 1):PHA
>LDA #LSB(addr - 1):PHA
>RTS
>
>and JSR to that. Supposing <addr> is not known until
>runtime that is.
>
My code was demonstrating the concept behind doing an effective JSR 
(addr) instruction (which doesn't exist as an opcode on 65(C1/0)2. There 
are various variants on this code,  mainly in where the address to jump 
comes from.

While your code does indeed save on memory space, and executes 
marginally quickker (about 8 cycles I think? Can't remember counts 
off-hand), its not as easy to read in terms of "whats it doing". While 
you and I can see whats going clearly (as can no doubt, most people on 
the list *now*) I was trying to demonstrate simply the concept of 
JSR'ing to an unknown address in the easiest possible manner :)


In response to the original query, Master Reference Manual Pt. 1 defines 
roughly 32 bytes starting &D80 as "trackerball use". Since the average 
M128 doesn't have one, I've safely used that part for data storage 
before without fear of software playing with it.

-- Richard