Date : Wed, 16 Nov 2005 18:29:52 -0000
From : "David Harper" <dl.harper@...>
Subject: Re:: Master Shadow RAM access?
"Richard Gellman" <splodge@...> wrote:
> There are 3 bits in ACCCON (&FE34) that govern this (from memory, called E
> X and Y - I may be wrong, as may be the usage of such terms in the
> following paragraph).
>
> X controls which block is paged into memory on a "permanent" basis. That
> is, when E is set, the shadow RAM *always* replaces the main memory.
> Y controls VDU driver access to the shadow RAM. When Y is set, the shadow
> RAM replaces the main memory *only* when the instructed being executed is
> in the VDU driver space (&C000-&DFFF I think).
>
> X overrides Y, so if both are set, the shadow RAM is always paged in.
>
> E controls the CRTC/VIDPROC access to shadow RAM. When E is set, the
> Shadow RAM will be displayed. When E is clear, the main RAM will be
> displayed. Note that E is independent of X & Y, so you can configure
> ACCCON to *display* shadow RAM, but have the CPU access *main* memory.
Not quite. There are four bits in ACCCON (location &FE34 - in the SHEILA
region) on the Master that control the memory paging, known as D, E, X and
Y. (These are bits 0 to 3 in order.)
D controls which portion of memory is displayed. If this is clear the
CRTC/VIDPROC system cause the contents of main memory to appear on screen;
if it is set the shadow memory area (also known as LYNNE) is what appears.
This bit does not affect the 6502's access to the memory at all.
E and X control whether LYNNE is paged in to the CPU's memory map. If X is
set then LYNNE is paged in absolutely. If E is set and X is clear then if
the CPU is processing an opcode (i.e. a machine-code instruction) from
locations between &C000 and &DFFF then memory reads and writes are to or
from LYNNE; if the opcode is located elsewere then main memory is used.
The idea of this rather complicated system is that all the VDU code (i.e.
OSWRCH) is located in the Master's ROM between &C000 and &DFFF. On the other
hand all language code, being in sideways memory or perhaps main memory, is
outside this region. This means E can remain set and languages will just use
main memory, except when they call OSWRCH (using for example PRINT, PLOT or
VDU from Basic). When this latter happens the writes are done to the shadow
memory. Of course, this only makes sense if bit D is set as well.
The bit Y does not control this part of memory. This pages in the 8k section
of memory known as HAZEL which occupies locations &C000 to &DFFF (and so
overlays the VDU code mentioned above). This contains pages of memory that
can be claimed by sideways-memory programs as workspace, so avoiding PAGE
being raised by filing systems etc., which was always a bugbear on the older
machines.
(The final section of extra RAM on the Master is known as ANDY, and can be
paged into locations &8000 to &8FFF. This is not controlled by ACCCON, but
by the top bit of the ROMSEL register at &FE30. This is used by the video
system as workspace.)
Of the above, HAZEL is normally paged in and ANDY paged out. When OSWRCH is
called (first to a location outside the paged regions - &E822 in Vn. 3.20)
it pages out HAZEL and pages in ANDY before jumping into the lower part of
the upper section of ROM (i.e. between &C000 and &DFFF). Before returning to
the calling program HAZEL is paged back in and ANDY paged out.
LYNNE is normally paged in conditionally (with D and E set, but X clear) if
shadow screen is being used; it is paged out (D, E and X all clear) if
normal screen is in use.
It is all rather complicated, but it works remarkably well.
By contrast, the B+ has a simpler but less flexible paging system. The
result is far more difficult to use, in practice, for machine-code
programmers who want direct access to the screen.
David Harper