Date   : Thu, 17 Nov 2005 02:25:03 +0000
From   : Richard Gellman <splodge@...>
Subject: Re:: Master Shadow RAM access?

David Harper wrote:

> "Richard Gellman" <splodge@...> wrote:
>
>> There are 3 bits in ACCCON (&FE34) that govern this (from memory, 
>> called E X and Y - I may be wrong, as may be the usage of such terms 
>> in the following paragraph).
>>
>> X controls which block is paged into memory on a "permanent" basis. 
>> That is, when E is set, the shadow RAM *always* replaces the main 
>> memory.
>> Y controls VDU driver access to the shadow RAM. When Y is set, the 
>> shadow RAM replaces the main memory *only* when the instructed being 
>> executed is in the VDU driver space (&C000-&DFFF I think).
>>
>> X overrides Y, so if both are set, the shadow RAM is always paged in.
>>
>> E controls the CRTC/VIDPROC access to shadow RAM. When E is set, the 
>> Shadow RAM will be displayed. When E is clear, the main RAM will be 
>> displayed. Note that E is independent of X & Y, so you can configure 
>> ACCCON to *display* shadow RAM, but have the CPU access *main* memory.
>
>
> Not quite. There are four bits in ACCCON (location &FE34 - in the 
> SHEILA region) on the Master that control the memory paging, known as 
> D, E, X and Y. (These are bits 0 to 3 in order.)

I was restricting myself to those bits of ACCCON that relate to the 
screen, which is 3, but yes there are other bits that do interesting 
things. Apparently, the "TST" bit (bit 6?) enables read access to the 
MOS ROM between &FC00 - &FEFF... but I have no idea how much truth rests 
in that.

And yes, I was COMPLETELY guessing at the bit letters :)

>
> D controls which portion of memory is displayed. If this is clear the 
> CRTC/VIDPROC system cause the contents of main memory to appear on 
> screen; if it is set the shadow memory area (also known as LYNNE) is 
> what appears. This bit does not affect the 6502's access to the memory 
> at all.
>
> E and X control whether LYNNE is paged in to the CPU's memory map. If 
> X is set then LYNNE is paged in absolutely. If E is set and X is clear 
> then if the CPU is processing an opcode (i.e. a machine-code 
> instruction) from locations between &C000 and &DFFF then memory reads 
> and writes are to or from LYNNE; if the opcode is located elsewere 
> then main memory is used.
>
That's what I said, although I did use the complete wrong bit names :)

-- Richard