Date   : Sun, 17 Feb 2008 10:36:48 +0000 (GMT)
From   : tommowalker@... (Tom Walker)
Subject: BBC FPGA Boots to BASIC... almost...

> I concur... The OS sets the PCR to have bit 0 clear, so the interrupt 
> occurs on negative edge of CA1. The 6845 sets CA1 high at start of vsync 
> and puts it low at the end, with position determined by 6845 R7 
> (specifies character row as I recall, the vsync starting on line 0 of 
> this row) and length of pulse according to upper nybble of 6845 R3.

Of course it is. I forget that even B-em emulates it like that ;)  That'll
learn me.

Tom


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